Experience level:
3.0
to
8.0 years
|
|
Roles and responsibility for
Vacancies for RTL Design, Logic Design / Front End Design Engineer:
IP design & development for Memory controllers, Mixed-Signal IP and pure digital IP development for MSP430 or ARM Cortex™-R core based SoCs.
Ownership of Complete IP development activity involving Concept development, RTL, synthesis, Lint & Equivalence check, etc.
Handling IP process requirements.
Participating and driving key aspects of IP specification (e.g clocking, resets, power management, etc)
Playing a significant role in driving timing constraints and closure at SOC level as well as interface timing
Working closely with PD, DFT and DV domain team members
Interface with Analog IP owners and device architects
Requirements for
Vacancies for RTL Design, Logic Design / Front End Design Engineer:
IP Design & Development in a product company.
Contact information for Vacancies for RTL Design, Logic Design / Front End Design Engineer:
Name: Ayesha Akther
E-mail: ayesha.akther@spectrumconsultants.com
Phone: 080-40740200
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