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<rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom" ><channel><atom:link href="http://www.spectrumindiajobs.com/rss.xml" rel="self" type="application/rss+xml" /><title>Spectrum Consultants Jobs</title><copyright>Copyright (c) 2009 TooStep.com All rights reserved.</copyright><link>http://www.spectrumindiajobs.com</link><description>Jobs</description><language>en-us</language><image><title>Spectrum Consultants Jobs</title><width>140</width><height>55</height><link>http://www.spectrumindiajobs.com</link><url>http://usrimg.toostep.com/images/jobsiteLogo/1/ad/111_file_290611134022</url></image>
<item><title>Java, Security, Oracle, Consultant Software Engineer, The Leaders in Network, Storage and Cloud Computing</title><guid>http://www.spectrumindiajobs.com/job/java-security-oracle-consultant-software-engineerleaders/2500974</guid><pubDate>Sat, 19 May 2012 06:08:41 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/java-security-oracle-consultant-software-engineerleaders/2500974</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/java-security-oracle-consultant-software-engineerleaders/2500974'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='Java, Security, Oracle, Consultant Software Engineer, The Leaders in Network, Storage and Cloud Computing' border='0' /&gt;&lt;/a&gt; Consultant Software  Engineer DESIGNATION: Consultant Software Engineer   EDUCATION: BE / BTech / MTech from CS background       PRINCIPAL DUTIES AND RESPONSIBILITIES   Architecture and design of Key Management products with seamless integration with other products in Security&#x2019;s portfolio of sol...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>Performance and functional architecture, system design, power consumption, Processor Architect, World leader in Visual Computing Technologies</title><guid>http://www.spectrumindiajobs.com/job/performance-and-functional-architecture-system-design/2308821</guid><pubDate>Sat, 19 May 2012 04:02:07 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/performance-and-functional-architecture-system-design/2308821</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/performance-and-functional-architecture-system-design/2308821'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='Performance and functional architecture, system design, power consumption, Processor Architect, World leader in Visual Computing Technologies' border='0' /&gt;&lt;/a&gt; RESPONSIBILITIES: - Researching design trade-offs in system cost, power consumption, and performance for next generation GPU SM processor - Developing system designs - Guiding the evolution of our instruction set architecture - Developing performance models - Developing performance simulators - ...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>Emulation, Verilog,VHDL,System Verilog, FPGA Design, Emulation Engineer, The world's largest provider of wireless chipset technology</title><guid>http://www.spectrumindiajobs.com/job/emulation-verilogvhdlsystem-verilog-fpga-design-emulation/2446594</guid><pubDate>Fri, 18 May 2012 19:34:58 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/emulation-verilogvhdlsystem-verilog-fpga-design-emulation/2446594</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/emulation-verilogvhdlsystem-verilog-fpga-design-emulation/2446594'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='Emulation, Verilog,VHDL,System Verilog, FPGA Design, Emulation Engineer, The world's largest provider of wireless chipset technology' border='0' /&gt;&lt;/a&gt; 2-8 years industry experience -Sound knowledge in Verilog/VHDL/System Verilog -Minimum 3+ years of multi-FPGA Design Verification experience (Xilinx preferred) -Sound knowledge of Synthesis, Timing Analysis, Place-n-route tools and methodologies -Good knowledge of ARM based SOC with experience i...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>Post Silicon Validation, Soc/Microcontroller, Sr. Validation Engineer, The World's Largest Microprocessor Manufacturer </title><guid>http://www.spectrumindiajobs.com/job/post-silicon-validation-socmicrocontroller-sr-validation/2457604</guid><pubDate>Fri, 18 May 2012 19:34:58 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/post-silicon-validation-socmicrocontroller-sr-validation/2457604</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/post-silicon-validation-socmicrocontroller-sr-validation/2457604'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='Post Silicon Validation, Soc/Microcontroller, Sr. Validation Engineer, The World's Largest Microprocessor Manufacturer ' border='0' /&gt;&lt;/a&gt; Senior Validation Engineer with prior experience in Pre-silicon validation on FPGA platforms, Post-silicon Validation and board design.More details: 1. Knowledge of ARM Cortex M cores, compilers and linkers is a must. 2. Prior validation experience in Serial communication protocols and complex m...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>Opportunity for Cloud Architect, Virtualization, Storage domain with a Storage giant in Bangalore</title><guid>http://www.spectrumindiajobs.com/job/opportunity-for-cloud-architect-virtualization-storage/2495333</guid><pubDate>Fri, 18 May 2012 19:34:58 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/opportunity-for-cloud-architect-virtualization-storage/2495333</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/opportunity-for-cloud-architect-virtualization-storage/2495333'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='Opportunity for Cloud Architect, Virtualization, Storage domain with a Storage giant in Bangalore' border='0' /&gt;&lt;/a&gt; Responsibilities: Ö         The Principal Architect will be required to multitask across work streams spanning PCIG infrastructure related technologies, seek commonalities between business processes for efficiencies and work to resolve inefficiencies from complex solutions related to Infrastruct...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>Power Estimation,  Clock Gating, Power Gating, Power Estimation and Modeling Lead, World leader in Visual Computing Technologies</title><guid>http://www.spectrumindiajobs.com/job/power-estimation-clock-gating-power/2307278</guid><pubDate>Fri, 18 May 2012 19:34:58 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/power-estimation-clock-gating-power/2307278</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/power-estimation-clock-gating-power/2307278'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='Power Estimation,  Clock Gating, Power Gating, Power Estimation and Modeling Lead, World leader in Visual Computing Technologies' border='0' /&gt;&lt;/a&gt; Architect and develop Power Estimation Models for key use-cases, Leakage, and IO Power. Design the tools based on these models, and develop solid validation methodology/infrastructures. Lead a team, interface/coordinate with external teams in the US and India that provides necessary input data t...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>DFT, Analog DFT, SOC, DFT Lead, World Leader in Visual Computing Technologies</title><guid>http://www.spectrumindiajobs.com/job/dft-analog-dft-soc-dft-lead/2457833</guid><pubDate>Fri, 18 May 2012 19:34:58 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/dft-analog-dft-soc-dft-lead/2457833</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/dft-analog-dft-soc-dft-lead/2457833'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='DFT, Analog DFT, SOC, DFT Lead, World Leader in Visual Computing Technologies' border='0' /&gt;&lt;/a&gt; DFT lead Engineer  Will be responsible for Designing Implementing DFT techniques (Advanced Scan/Compression/At-speed Scan/Core based DFT) on Complex SOCs with Analog IPs to improve testability. Test vector generation (DC/AC/path delay/IDDQ/Bridging fault) with highest possible test coverage with...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>Enterprise security product develper, Principle software engineer, with Storage giant in Bangalore, India</title><guid>http://www.spectrumindiajobs.com/job/enterprise-security-product-develper-principle-software/2497774</guid><pubDate>Fri, 18 May 2012 19:34:58 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/enterprise-security-product-develper-principle-software/2497774</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/enterprise-security-product-develper-principle-software/2497774'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='Enterprise security product develper, Principle software engineer, with Storage giant in Bangalore, India' border='0' /&gt;&lt;/a&gt; Design and development of enterprise security product with seamless integration with other products in the organization&#x2019;s portfolio of solutions Accountable for delivery of subsystem, anticipate issues and addresses proactively. Writes high level design specs, unit test plans and integration tes...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>File system development opportunity with Storage giant for Bangalore</title><guid>http://www.spectrumindiajobs.com/job/file-system-development-opportunity-with-storage/2497779</guid><pubDate>Fri, 18 May 2012 19:34:58 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/file-system-development-opportunity-with-storage/2497779</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/file-system-development-opportunity-with-storage/2497779'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='File system development opportunity with Storage giant for Bangalore' border='0' /&gt;&lt;/a&gt; Principal Responsibilities Design and code software using the established development process. Unit test, debug and correct defects Generate appropriate documentation for the design and implementation of the software modules, and the proper ongoing support of software modules Participate in desi...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>Job Opening for Fault, Network Installation, Engineer/ Sr. Engineer with World Leader in Data and Voice Communications at Madhya Pradesh</title><guid>http://www.spectrumindiajobs.com/job/job-opening-for-fault-network-installation/320940</guid><pubDate>Fri, 18 May 2012 13:34:33 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/job-opening-for-fault-network-installation/320940</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/job-opening-for-fault-network-installation/320940'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='Job Opening for Fault, Network Installation, Engineer/ Sr. Engineer with World Leader in Data and Voice Communications at Madhya Pradesh' border='0' /&gt;&lt;/a&gt; Overall Incharge for Installation and Fault Repair /OnM Actvity at Cluster level . To maximize the IFR revenue thru effective opeartion and cost optimization . Close coordination with Business, CSD , NSG Teams. Cross functional coordination (within Technical) like Transmission, switch, NOC, OSP ...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>Job Opening for NGN Swith, TDM Switch, Switching/Router Engineer for NOC with World Leader in Data and Voice Communications at Gurgaon</title><guid>http://www.spectrumindiajobs.com/job/job-opening-for-ngn-swith-tdm/320938</guid><pubDate>Fri, 18 May 2012 13:32:14 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/job-opening-for-ngn-swith-tdm/320938</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/job-opening-for-ngn-swith-tdm/320938'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='Job Opening for NGN Swith, TDM Switch, Switching/Router Engineer for NOC with World Leader in Data and Voice Communications at Gurgaon' border='0' /&gt;&lt;/a&gt; To ensure Maximum Network up time. High customer satisfaction by taking immediate action on each and every customer complaint Exposure and knowledge of Telecommunication NGN and TDM switch  technology. Knowledge of Protocols such as SS7, SIP, TCP/IP, SIGTRAN, H323, V5.2, DSS1 Exposure to Media G...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>C/C++, Field Application Engineer, Silicon Chip Company - leaders in DSP</title><guid>http://www.spectrumindiajobs.com/job/cc-field-application-engineer-silicon-chip/2535802</guid><pubDate>Thu, 17 May 2012 19:37:46 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/cc-field-application-engineer-silicon-chip/2535802</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/cc-field-application-engineer-silicon-chip/2535802'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='C/C++, Field Application Engineer, Silicon Chip Company - leaders in DSP' border='0' /&gt;&lt;/a&gt; Job Description Required Basic Qualifications: 4 to 8 years of work experience in Microcontroller/DSC applications, Good Knowledge of writing software programs in C/C++ language, Hands-On experience, Systems knowledge on development for couple of End Equipments/applications, Good Communication a...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>SRAM, Circuit Design, CMOS, Memory Design Engineer, Largest Silicon Chip Company - leaders in DSP</title><guid>http://www.spectrumindiajobs.com/job/sram-circuit-design-cmos-memory-design/2460887</guid><pubDate>Thu, 17 May 2012 04:35:30 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/sram-circuit-design-cmos-memory-design/2460887</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/sram-circuit-design-cmos-memory-design/2460887'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='SRAM, Circuit Design, CMOS, Memory Design Engineer, Largest Silicon Chip Company - leaders in DSP' border='0' /&gt;&lt;/a&gt; Primary and Secondary Responsibilities: Development of SRAM designs, circuits in cutting edge CMOS technology Complex Tasks: Design of complex SRAM circuits including single port, two port memories or register files, CAMs. This includes designing for memories with methodologies that allow for ro...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>opening for Senior Synthesis and STA Engineer </title><guid>http://www.spectrumindiajobs.com/job/opening-for-senior-synthesis-and-sta/321026</guid><pubDate>Wed, 16 May 2012 19:37:05 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/opening-for-senior-synthesis-and-sta/321026</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/opening-for-senior-synthesis-and-sta/321026'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='opening for Senior Synthesis and STA Engineer ' border='0' /&gt;&lt;/a&gt; * Own/drive the STA and timing closure activities for the design. * Use of Synopsis DC Synopsys Primetime tools and Primetime SI tools * Use of Cadence RC and ETS  * Write simple scripts to process the reports, come up with ECO etc., * Timing closure for full chip SoC design. ...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>job opening for Software Engineer, World's largest IT Conglomerate, Bangalore</title><guid>http://www.spectrumindiajobs.com/job/job-opening-for-software-engineer-worlds/331019</guid><pubDate>Wed, 16 May 2012 19:37:05 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/job-opening-for-software-engineer-worlds/331019</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/job-opening-for-software-engineer-worlds/331019'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='job opening for Software Engineer, World's largest IT Conglomerate, Bangalore' border='0' /&gt;&lt;/a&gt; looking for a Senior Software Engineers who will develop and enhance platform development tools for Power Systems Management Consoles. Architect, design, develop, enhance and maintain software applications in Systems Management Console environment. Follow Agile design and implementation processe...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>Senior Position - Director ASIC Design</title><guid>http://www.spectrumindiajobs.com/job/senior-position-director-asic-design/495887</guid><pubDate>Wed, 16 May 2012 19:37:05 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/senior-position-director-asic-design/495887</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/senior-position-director-asic-design/495887'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='Senior Position - Director ASIC Design' border='0' /&gt;&lt;/a&gt; &#x2022;To lead the design team comprising of 50+ Engineers working on  state of the art ASIC implementations for connectivity products including WLAN Access Points/Routers, STBs,etc &#x2022;Drive the large HW teams involved in various activities including: RTL, Digital Validation, HW Emulation, RF, Chip Vali...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title> Business Development  Manager Online jobs bangalore</title><guid>http://www.spectrumindiajobs.com/job/business-development-manager-online/268306</guid><pubDate>Wed, 16 May 2012 19:37:05 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/business-development-manager-online/268306</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/business-development-manager-online/268306'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt=' Business Development  Manager Online jobs bangalore' border='0' /&gt;&lt;/a&gt; Key Responsibilities: Lead - Hiring, Managing a category team distributed across the country - The team Execute - Strong bias for Action :  Company works at a very rapid pace that is what would be expected from the category function as well - Recognise sources and set up Vendor Accounts for dail...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>job opening for DFT Engineer</title><guid>http://www.spectrumindiajobs.com/job/job-opening-for-dft-engineer/321055</guid><pubDate>Wed, 16 May 2012 19:37:05 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/job-opening-for-dft-engineer/321055</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/job-opening-for-dft-engineer/321055'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='job opening for DFT Engineer' border='0' /&gt;&lt;/a&gt; will work independently on: a. SOC and IP level DFT architecture and design b. Speed Scan ATPG and TFT implementation and verification c. PBIST / IDDQ / DC Para verification d. Coverage analysis e. Test constraints and DFT STA ...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>Job Opening for  Java Developer, World's largest IT Conglomerate, Bangalore</title><guid>http://www.spectrumindiajobs.com/job/job-opening-for-java-developer/331045</guid><pubDate>Wed, 16 May 2012 19:37:05 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/job-opening-for-java-developer/331045</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/job-opening-for-java-developer/331045'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='Job Opening for  Java Developer, World's largest IT Conglomerate, Bangalore' border='0' /&gt;&lt;/a&gt; Skills - Mandatory   Advanced level knowledge of Core JAVA including installation, administration, troubleshooting and performance tuning. Good knowledge of Java programming Perl programming REST API. Good knowledge of Shell programming including creating/modifying build files and performance mo...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>Financial Planning/Strategy, Operations, Principal Program Manager, The Leaders in Network, Storage and Cloud Computing, Bangalore</title><guid>http://www.spectrumindiajobs.com/job/financial-planningstrategy-operations-principal-program-mana/2501164</guid><pubDate>Wed, 16 May 2012 19:37:05 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/financial-planningstrategy-operations-principal-program-mana/2501164</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/financial-planningstrategy-operations-principal-program-mana/2501164'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='Financial Planning/Strategy, Operations, Principal Program Manager, The Leaders in Network, Storage and Cloud Computing, Bangalore' border='0' /&gt;&lt;/a&gt; Process Excellence Role Role As a strategic consultant to CFO&#x2019;s office, assist in overall COE business planning, analyses and decision support End-to-end program management of various initiatives (Finance + extended staff) through cross-functional / global coordination Explore process synergies ...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>opening for Analog Design Engineer</title><guid>http://www.spectrumindiajobs.com/job/opening-for-analog-design-engineer/321070</guid><pubDate>Wed, 16 May 2012 19:37:05 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/opening-for-analog-design-engineer/321070</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/opening-for-analog-design-engineer/321070'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='opening for Analog Design Engineer' border='0' /&gt;&lt;/a&gt; Design of PLL, oscillators, ADC, DAC Primary and Secondary Responsibilities: Be responsible for completing block designs Complex Tasks: Should be well versed with Silicon Debug at the block level Management/Organizational Skills: Schedule bound ...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>Timing closure, placement/routing, logic optimization, Timing/STA, World leader in Visual Computing Technologies, Bangalore</title><guid>http://www.spectrumindiajobs.com/job/timing-closure-placementrouting-logic-optimization-timingsta/2546735</guid><pubDate>Wed, 16 May 2012 19:37:05 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/timing-closure-placementrouting-logic-optimization-timingsta/2546735</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/timing-closure-placementrouting-logic-optimization-timingsta/2546735'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='Timing closure, placement/routing, logic optimization, Timing/STA, World leader in Visual Computing Technologies, Bangalore' border='0' /&gt;&lt;/a&gt; In this role you will be responsible for developing static timing analysis (STA) constraints, running full chip and partition level STA, and generating appropriate timing ECOs for the design. As part of our global team, you will be expected to help contribute to improvement of our overall method...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title> Category  Management - VP/AVP/Senior Manager </title><guid>http://www.spectrumindiajobs.com/job/category-management-vpavpsenior/354631</guid><pubDate>Wed, 16 May 2012 19:37:05 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/category-management-vpavpsenior/354631</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/category-management-vpavpsenior/354631'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt=' Category  Management - VP/AVP/Senior Manager ' border='0' /&gt;&lt;/a&gt; Key Responsibilities: Lead - Hiring, Managing a category team distributed across the country - The team Execute - Strong bias for Action :  Company works at a very rapid pace that is what would be expected from the category function as well - Recognise sources and set up Vendor Accounts for dail...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>opening for Analog Circuit Design Engineer</title><guid>http://www.spectrumindiajobs.com/job/opening-for-analog-circuit-design-engineer/331092</guid><pubDate>Wed, 16 May 2012 19:37:05 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/opening-for-analog-circuit-design-engineer/331092</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/opening-for-analog-circuit-design-engineer/331092'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='opening for Analog Circuit Design Engineer' border='0' /&gt;&lt;/a&gt; Analog design &#x2013; job involves the design of analog circuits in high speed interfaces. ...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>positions for Analog Circuit Design Engineer</title><guid>http://www.spectrumindiajobs.com/job/positions-for-analog-circuit-design-engineer/331095</guid><pubDate>Wed, 16 May 2012 19:37:05 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/positions-for-analog-circuit-design-engineer/331095</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/positions-for-analog-circuit-design-engineer/331095'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='positions for Analog Circuit Design Engineer' border='0' /&gt;&lt;/a&gt; Analog design &#x2013; job involves the design of analog circuits in high speed interfaces. ...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>opportunity for Analog Circuit Design Engineer</title><guid>http://www.spectrumindiajobs.com/job/opportunity-for-analog-circuit-design-engineer/331096</guid><pubDate>Wed, 16 May 2012 19:37:05 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/opportunity-for-analog-circuit-design-engineer/331096</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/opportunity-for-analog-circuit-design-engineer/331096'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='opportunity for Analog Circuit Design Engineer' border='0' /&gt;&lt;/a&gt; Analog design &#x2013; job involves the design of analog circuits in high speed interfaces. ...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>opening for Analog Circuit Design Engineer </title><guid>http://www.spectrumindiajobs.com/job/opening-for-analog-circuit-design-engineer/331097</guid><pubDate>Wed, 16 May 2012 19:37:05 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/opening-for-analog-circuit-design-engineer/331097</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/opening-for-analog-circuit-design-engineer/331097'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='opening for Analog Circuit Design Engineer ' border='0' /&gt;&lt;/a&gt; Analog design &#x2013; job involves the design of analog circuits in high speed interfaces. ...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>vacancy for Analog Circuit Design Engineer</title><guid>http://www.spectrumindiajobs.com/job/vacancy-for-analog-circuit-design-engineer/331098</guid><pubDate>Wed, 16 May 2012 19:37:05 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/vacancy-for-analog-circuit-design-engineer/331098</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/vacancy-for-analog-circuit-design-engineer/331098'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='vacancy for Analog Circuit Design Engineer' border='0' /&gt;&lt;/a&gt; Analog design &#x2013; job involves the design of analog circuits in high speed interfaces. ...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>opening for Senior Analog Design Engineer</title><guid>http://www.spectrumindiajobs.com/job/opening-for-senior-analog-design-engineer/331100</guid><pubDate>Wed, 16 May 2012 19:37:05 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/opening-for-senior-analog-design-engineer/331100</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/opening-for-senior-analog-design-engineer/331100'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='opening for Senior Analog Design Engineer' border='0' /&gt;&lt;/a&gt; Primary and Secondary Responsibilities: Seniour analog designer in the team working independently in development of high performance, low power analog IP building blocks embedded in TI&#x2019;s MCU products Complex Tasks: Developing very low power, high performance analog in presence of large digital l...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>job opening for Analog Design Engineer</title><guid>http://www.spectrumindiajobs.com/job/job-opening-for-analog-design-engineer/331101</guid><pubDate>Wed, 16 May 2012 19:37:05 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/job-opening-for-analog-design-engineer/331101</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/job-opening-for-analog-design-engineer/331101'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='job opening for Analog Design Engineer' border='0' /&gt;&lt;/a&gt; Design of PLL, oscillators, ADC, DAC Primary and Secondary Responsibilities: Be responsible for completing block designs Complex Tasks: Should be well versed with Silicon Debug at the block level Management/Organizational Skills: Schedule bound ...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>DFT, DFT / Design for Testing, World leader in Visual Computing Technologies, Bangalore</title><guid>http://www.spectrumindiajobs.com/job/dft-dft-design-for-testing/2338654</guid><pubDate>Wed, 16 May 2012 19:37:05 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/dft-dft-design-for-testing/2338654</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/dft-dft-design-for-testing/2338654'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='DFT, DFT / Design for Testing, World leader in Visual Computing Technologies, Bangalore' border='0' /&gt;&lt;/a&gt; As a DFT engineer, you'll be responsible for cutting edge DFT involving designing key DFT logic modules and verifying them. These include test mode controllers, IO bist, Memory Bist/Repair and Jtag. In addition you will be responsible for scan insertion and ATPG and post silicon validation.   ...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>Job Opportunity for Physical Design Engineers</title><guid>http://www.spectrumindiajobs.com/job/job-opportunity-for-physical-design-engineers/331108</guid><pubDate>Wed, 16 May 2012 19:37:05 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/job-opportunity-for-physical-design-engineers/331108</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/job-opportunity-for-physical-design-engineers/331108'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='Job Opportunity for Physical Design Engineers' border='0' /&gt;&lt;/a&gt; - Responsible for all aspects of physical design and implementation of processor and other ASICs - Participating in establishing physical design methodologies, flow automation, chip floor plan, power/clock distribution, chip assembly and P J12, timing closure. - Working on static timing analysis...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>Job Opportunity for Senior Physical Design Engineers</title><guid>http://www.spectrumindiajobs.com/job/job-opportunity-for-senior-physical-design/331110</guid><pubDate>Wed, 16 May 2012 19:37:05 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/job-opportunity-for-senior-physical-design/331110</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/job-opportunity-for-senior-physical-design/331110'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='Job Opportunity for Senior Physical Design Engineers' border='0' /&gt;&lt;/a&gt; 'Responsible for designing, developing, modifying and evaluating electronic parts, components or integrated circuitry for electronic equipment and other hardware systems. Determines design approaches and parameters. Analyzes equipment to establish operating data, conducts experimental tests and ...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>Java/J2EE, Security, Oracle, Principal Software Engineer, The Leaders in Network, Storage and Cloud Computing, Bangalore</title><guid>http://www.spectrumindiajobs.com/job/javaj2ee-security-oracle-principal-software-engineerleaders/2500973</guid><pubDate>Wed, 16 May 2012 19:37:05 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/javaj2ee-security-oracle-principal-software-engineerleaders/2500973</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/javaj2ee-security-oracle-principal-software-engineerleaders/2500973'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='Java/J2EE, Security, Oracle, Principal Software Engineer, The Leaders in Network, Storage and Cloud Computing, Bangalore' border='0' /&gt;&lt;/a&gt; Consultant Software  Engineer DESIGNATION: Consultant Software Engineer   EDUCATION: BE / BTech / MTech from CS background       PRINCIPAL DUTIES AND RESPONSIBILITIES   Architecture and design of Key Management products with seamless integration with other products in RSA Security&#x2019;s portfolio of...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>Job opening for JAVA J2EE NMS; Software Developer with World Leader in Data and Voice Communications at Bangalore</title><guid>http://www.spectrumindiajobs.com/job/job-opening-for-java-j2ee-nms/465267</guid><pubDate>Wed, 16 May 2012 19:37:05 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/job-opening-for-java-j2ee-nms/465267</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/job-opening-for-java-j2ee-nms/465267'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='Job opening for JAVA J2EE NMS; Software Developer with World Leader in Data and Voice Communications at Bangalore' border='0' /&gt;&lt;/a&gt; JOB DUTIES Design and implementation of a large scale Network Management Software (NMS) using Java on Standard Computers. Includes writing functional and Design specifications, interfacing with other components according to specifications, unit testing, fixing defects found by SQA and Customers....&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>C \C++, L2 L3 Protocols, System Architect with World Leader in Data and Voice Communications, Chennai</title><guid>http://www.spectrumindiajobs.com/job/c-c-l2-l3-protocols-system/465268</guid><pubDate>Wed, 16 May 2012 19:37:05 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/c-c-l2-l3-protocols-system/465268</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/c-c-l2-l3-protocols-system/465268'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='C \C++, L2 L3 Protocols, System Architect with World Leader in Data and Voice Communications, Chennai' border='0' /&gt;&lt;/a&gt; Self-motivated engineer able to provide technical guidance for large and complex projects within a global development team. Demonstrate ability to manage designs that impact the end to end system architecture for the ISAM product.    Applicant must be able to understand complex problems and then...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>opening for Senior Analog Design Engineer</title><guid>http://www.spectrumindiajobs.com/job/opening-for-senior-analog-design-engineer/321146</guid><pubDate>Wed, 16 May 2012 19:37:05 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/opening-for-senior-analog-design-engineer/321146</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/opening-for-senior-analog-design-engineer/321146'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='opening for Senior Analog Design Engineer' border='0' /&gt;&lt;/a&gt; Primary and Secondary Responsibilities: Seniour analog designer in the team working independently in development of high performance, low power analog IP building blocks embedded in TI&#x2019;s MCU products Complex Tasks: Developing very low power, high performance analog in presence of large digital l...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>DFT, DFT / Design for Testing, World leader in Visual Computing Technologies, Bangalore</title><guid>http://www.spectrumindiajobs.com/job/dft-dft-design-for-testing/2305664</guid><pubDate>Wed, 16 May 2012 19:37:05 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/dft-dft-design-for-testing/2305664</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/dft-dft-design-for-testing/2305664'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='DFT, DFT / Design for Testing, World leader in Visual Computing Technologies, Bangalore' border='0' /&gt;&lt;/a&gt; As a DFT engineer, you'll be responsible for cutting edge DFT involving designing key DFT logic modules and verifying them. These include test mode controllers, IO bist, Memory Bist/Repair and Jtag. In addition you will be responsible for scan insertion and ATPG and post silicon validation.   ...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>Timing closure, placement/routing, logic optimization, Timing/STA, World leader in Visual Computing Technologies</title><guid>http://www.spectrumindiajobs.com/job/timing-closure-placementrouting-logic-optimization-timingsta/2305665</guid><pubDate>Wed, 16 May 2012 19:37:05 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/timing-closure-placementrouting-logic-optimization-timingsta/2305665</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/timing-closure-placementrouting-logic-optimization-timingsta/2305665'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='Timing closure, placement/routing, logic optimization, Timing/STA, World leader in Visual Computing Technologies' border='0' /&gt;&lt;/a&gt; In this role you will be responsible for developing static timing analysis (STA) constraints, running full chip and partition level STA, and generating appropriate timing ECOs for the design. As part of our global team, you will be expected to help contribute to improvement of our overall method...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>Job Opening Network Capacity Planning, MPLS with World Leader in Data and Voice Communications at Gurgaon</title><guid>http://www.spectrumindiajobs.com/job/job-opening-network-capacity-planning-mpls/379042</guid><pubDate>Wed, 16 May 2012 19:37:05 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/job-opening-network-capacity-planning-mpls/379042</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/job-opening-network-capacity-planning-mpls/379042'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='Job Opening Network Capacity Planning, MPLS with World Leader in Data and Voice Communications at Gurgaon' border='0' /&gt;&lt;/a&gt;       Recruiter:     Description Join the team that's transforming the way the world communication Network Planning and Engineering (NPE) team Architect and design the new generation network to provide  broadband and enterprise services. The team is responsible for capacity planning, new solutio...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>opening for Analog Circuit Design Engineer</title><guid>http://www.spectrumindiajobs.com/job/opening-for-analog-circuit-design-engineer/321189</guid><pubDate>Wed, 16 May 2012 19:37:05 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/opening-for-analog-circuit-design-engineer/321189</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/opening-for-analog-circuit-design-engineer/321189'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='opening for Analog Circuit Design Engineer' border='0' /&gt;&lt;/a&gt; Analog design &#x2013; job involves the design of analog circuits in high speed interfaces. ...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>Job Opening for Physical Design Engineers</title><guid>http://www.spectrumindiajobs.com/job/job-opening-for-physical-design-engineers/320959</guid><pubDate>Wed, 16 May 2012 19:37:05 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/job-opening-for-physical-design-engineers/320959</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/job-opening-for-physical-design-engineers/320959'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='Job Opening for Physical Design Engineers' border='0' /&gt;&lt;/a&gt; - Responsible for all aspects of physical design and implementation of processor and other ASICs - Participating in establishing physical design methodologies, flow automation, chip floor plan, power/clock distribution, chip assembly and P J12, timing closure. - Working on static timing analysis...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>Job Position for Senior Physical Design Engineers</title><guid>http://www.spectrumindiajobs.com/job/job-position-for-senior-physical-design/320961</guid><pubDate>Wed, 16 May 2012 19:37:05 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/job-position-for-senior-physical-design/320961</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/job-position-for-senior-physical-design/320961'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='Job Position for Senior Physical Design Engineers' border='0' /&gt;&lt;/a&gt; 'Responsible for designing, developing, modifying and evaluating electronic parts, components or integrated circuitry for electronic equipment and other hardware systems. Determines design approaches and parameters. Analyzes equipment to establish operating data, conducts experimental tests and ...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>Vacancies for RTL Design, Logic Design / Front End Design Engineer</title><guid>http://www.spectrumindiajobs.com/job/vacancies-for-rtl-design-logic-design/320962</guid><pubDate>Wed, 16 May 2012 19:37:05 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/vacancies-for-rtl-design-logic-design/320962</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/vacancies-for-rtl-design-logic-design/320962'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='Vacancies for RTL Design, Logic Design / Front End Design Engineer' border='0' /&gt;&lt;/a&gt; IP design development for Memory controllers, Mixed-Signal IP and pure digital IP development for MSP430 or ARM Cortex&#x2122;-R core based SoCs. Ownership of Complete IP development activity involving Concept development, RTL, synthesis, Lint Equivalence check, etc. Handling IP process requirements. P...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>Opening for ASIC Design Engineer</title><guid>http://www.spectrumindiajobs.com/job/opening-for-asic-design-engineer/320963</guid><pubDate>Wed, 16 May 2012 19:37:05 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/opening-for-asic-design-engineer/320963</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/opening-for-asic-design-engineer/320963'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='Opening for ASIC Design Engineer' border='0' /&gt;&lt;/a&gt; In this position, the candidate will be responsible for design of soft IP cores for the next generation chips (including SOCs) for the different market segments. ...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>Core Java, Perl, JAVA/Perl Lead Developer, World's largest IT Conglomerate, Bangalore</title><guid>http://www.spectrumindiajobs.com/job/core-java-perl-javaperl-lead-developer/369610</guid><pubDate>Wed, 16 May 2012 19:37:05 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/core-java-perl-javaperl-lead-developer/369610</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/core-java-perl-javaperl-lead-developer/369610'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='Core Java, Perl, JAVA/Perl Lead Developer, World's largest IT Conglomerate, Bangalore' border='0' /&gt;&lt;/a&gt; JAVA/Perl Lead Developer Skills - Mandatory 1. Advanced level knowledge of Core JAVA including installation, administration, troubleshooting and performance tuning. 2. Good knowledge of Java programming Perl programming REST API. 3. Good knowledge of Shell programming including creating/modifyin...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>Job opening for System programming with World's largest IT Conglomerate, Bangalore Hyderabad Pune</title><guid>http://www.spectrumindiajobs.com/job/job-opening-for-system-programming-with/661215</guid><pubDate>Wed, 16 May 2012 19:37:05 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/job-opening-for-system-programming-with/661215</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/job-opening-for-system-programming-with/661215'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='Job opening for System programming with World's largest IT Conglomerate, Bangalore Hyderabad Pune' border='0' /&gt;&lt;/a&gt; Strong system programming experience. ...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>Opening for RTL Design</title><guid>http://www.spectrumindiajobs.com/job/opening-for-rtl-design/320992</guid><pubDate>Wed, 16 May 2012 19:37:05 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/opening-for-rtl-design/320992</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/opening-for-rtl-design/320992'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='Opening for RTL Design' border='0' /&gt;&lt;/a&gt; 'Primary and Secondary Responsibilities: Design and Validation of RTL for Digital Power Supply Controller IC for Server CPU and Memory Applications.Ownership of all Digital Designs for CPM world-wide Team Complex Tasks: (a)   Digital Design Implementation (RTL Coding, synthesis, ATPG, Static Tim...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>Opening for Director Hardware Engineering</title><guid>http://www.spectrumindiajobs.com/job/opening-for-director-hardware-engineering/320995</guid><pubDate>Wed, 16 May 2012 19:37:05 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/opening-for-director-hardware-engineering/320995</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/opening-for-director-hardware-engineering/320995'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='Opening for Director Hardware Engineering' border='0' /&gt;&lt;/a&gt; &#x2022;To lead the design team comprising of 50+ Engineers working on  state of the art ASIC implementations for connectivity products including WLAN Access Points/Routers, STBs,etc &#x2022;Drive the large HW teams involved in various activities including: RTL, Digital Validation, HW Emulation, RF, Chip Vali...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>opening for STA Engineer </title><guid>http://www.spectrumindiajobs.com/job/opening-for-sta-engineer/320997</guid><pubDate>Wed, 16 May 2012 19:37:05 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/opening-for-sta-engineer/320997</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/opening-for-sta-engineer/320997'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='opening for STA Engineer ' border='0' /&gt;&lt;/a&gt; will work on STA using Synopsys timing tools. Should be able to work independently on: a. Functional timing constraints b. Timing analysis and fixes c. Understanding of Max load / cap / trans violations and fixes d. Understanding of impact of signal integrity on timing ...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
<item><title>Job Openings for Physical Design Engineers</title><guid>http://www.spectrumindiajobs.com/job/job-openings-for-physical-design-engineers/495865</guid><pubDate>Wed, 16 May 2012 19:37:05 +0530</pubDate><link>http://www.spectrumindiajobs.com/job/job-openings-for-physical-design-engineers/495865</link><description>&lt;p&gt;&lt;a href='http://www.spectrumindiajobs.com/job/job-openings-for-physical-design-engineers/495865'&gt;&lt;img src='http://usrimg.toostep.com/images/jobsiteLogo/1/avtarIcon/111_file_290611134022' align='left' alt='Job Openings for Physical Design Engineers' border='0' /&gt;&lt;/a&gt; -             Good understanding of deep submicron process issues and circuit design is required -              Hands on experience in power integrity analysis at gate level and transistor level e.g. voltage drop, power EM. -              Understand and perform block chip-level power analysis. -...&lt;/p&gt;&lt;br clear='all'/&gt;</description></item>
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